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  stepper motor driver the mc3479 is designed to drive a twophase stepper motor in the bipolar mode. the circuit consists of four input sections, a logic decoding/sequencing section, two driverstages for the motor coils, and an output to indicate the phase a drive state. ? single supply operation: 7.2 to 16.5 v ? 350 ma/coil drive capability ? clamp diodes provided for backemf suppression ? selectable cw /ccw and full /half step operation ? selectable high/low output impedance (half step mode) ? ttl/cmos compatible inputs ? input hysteresis: 400 mv minimum ? phase logic can be initialized to phase a ? phase a output drive state indication (opencollector) cw /ccw v m gnd bias /set phase a logic driver oic driver f /h step clk clock figure 1. representative block diagram l4 l3 v d l2 l1 oic full /half step cw /ccw ordering information device operating temperature range package mc3479p t a = 0 to +70 c plastic on semiconductor  ? semiconductor components industries, llc, 2001 august, 2001 rev. 3 1 publication order number: mc3479/d mc3479 semiconductor technical data stepper motor driver p suffix plastic package case 648c (top view) 1 oic gnd clk bias /set 16 v m gnd pin connections 9 8 4 7 6 5 3 2 l1 l2 ful l/half step v d cw /ccw phase a l4 l3 15 14 13 12 11 10 input truth table input low input high cw ccw full step half step hi z low z cw /ccw full /half step oic positive edge triggered clk
mc3479 http://onsemi.com 2 maximum ratings rating symbol value unit supply voltage v m + 18 vdc clamp diode cathode voltage (pin 1) v d v m + 5.0 vdc driver output voltage v od v m + 6.0 vdc drive output current/coil i od 500 ma input voltage (logic controls) v in 0.5 to + 7.0 vdc bias /set current i bs 10 ma phase a output voltage v oa + 18 vdc phase a sink current i oa 20 ma junction temperature t j + 150 c storage temperature range t stg 65 to + 150 c recommended operating conditions characteristic symbol min max unit supply voltage v m + 7.2 + 16.5 vdc clamp diode cathode voltage v d v m v m + 4.5 vdc driver output current (per coil) (note 1) i od e 350 ma input voltage (logic controls) v in 0 + 5.5 vdc bias /set current (outputs active) i bs 300 75 m a phase a output voltage v oa e v m vdc phase a sink current i oa 0 8.0 ma operating ambient temperature t a 0 + 70 c note: 1. see section on power dissipation in application information. dc electrical characteristics (specifications apply over the recommended supply voltage and temperature range, [notes 2, 3] unless otherwise noted.) characteristic pins symbol min typ max unit input logic levels threshold voltage (lowtohigh) 7, 8, 910 v tlh e e 2.0 vdc threshold voltage (hightolow) 9, 10 v thl 0.8 e e vdc hysteresis v hys 0.4 e e vdc current: (v i = 0.4 v) current: (v i = 5.5 v) current: (v i = 2.7 v) i il 100 e e e e e e +100 +20 m a driver output levels output high voltage 2, 3, v ohd vdc (i bs = 300 m a): (i od = 350 ma) (i bs = 300 m a): (i od = 0.1 ma) 14, 15 v m 2.0 v m 1.2 e e e e output low voltage (i bs = 300 m a, i od = 350 ma) v old e e 0.8 vdc differential mode output voltage difference (note 4) dv od e e 0.15 vdc (i bs = 300 m a, i od = 350 ma) common mode output voltage difference (note 5) cv od e e 0.15 vdc (i bs = 300 m a, i od = 0.1 ma) output leakage, hi z state m a (0  v od  v m , i bs = 5.0 m a) i oz1 100 e + 100 (0  v od  v m , i bs = 300 m a, f/h = 2.0 v, oic = 0.8 v) i oz2 100 e + 100 notes: 2. algebraic convention rather than absolute values is used to designate limit values. 3. current into a pin is designated as positive. current out of a pin is designated as negative. 4. dv od = ? v od1,2 v od3,4 ? where: v od1,2 = (v ohd1 v old2 ) or (v ohd2 v old1 ), and v od3,4 = (v ohd3 v old4 ) or (v ohd4 v old3 ). 5. cv od = ? v ohd1 v ohd2 ? or ? v ohd3 v ohd4 ? .
mc3479 http://onsemi.com 3 dc electrical characteristics (specifications apply over the recommended supply voltage and temperature range, [notes 2, 3] unless otherwise noted.) characteristic pins symbol min typ max unit clamp diodes forward voltage 1, 2, 3, v df e 2.5 3.0 vdc (i d = 350 ma) 14, 15 leakage current (per diode) i dr e e 100 m a (pin 1 = 21 v; outputs = 0 v; i bs = 0 m a) phase a output output low voltage 11 v ola e e 0.4 vdc (i oa = 8.0 ma) off state leakage current i oha e e 100 m a (v oha = 16.5 v) power supply power supply current 16 ma (i od = 0 m a, i bs = 300 m a) (l1 = v ohd , l2 = v old , l3 = v ohd , l4 = v old ) i mw e e 70 (l1 = v ohd , l2 = v old , l3 = hi z, l4 = hi z) i mz e e 40 (l1 = v ohd , l2 = v old , l3 = v ohd , l4 = v ohd ) i mn e e 75 bias /set current to set phase a 6 i bs 5.0 e e m a package thermal characteristics characteristic symbol min typ max unit thermal resistance, junctiontoambient (no heatsink) r q ja e 45 e c/w ac switching characteristics (t a = + 25 c, v m = 12 v) (see figures 2, 3, 4) characteristic pins symbol min typ max unit clock frequency 7 f ck 0 e 50 khz clock pulse width (high) 7 pw ckh 10 e e m s clock pulse width (low) 7 pw ckl 10 e e m s bias /set pulse width 6 pw bs 10 e e m s setup time (cw /ccw and f /hs) 107 97 t su 5.0 e e m s hold time (cw /ccw and f /hs) 107 97 t h 10 e e m s propagation delay (clktodriver output) t pcd e 8.0 e m s propagation delay (bias /settodriver output) t pbsd e 1.0 e m s propagation delay (clktophase a low) 711 t phla e 12 e m s propagation delay (clktophase a high) 711 t plha e 5.0 e m s notes: 2. algebraic convention rather than absolute values is used to designate limit values. 3. current into a pin is designated as positive. current out of a pin is designated as negative.
mc3479 http://onsemi.com 4 5 phase a + 12 v mc3479p cw / ccw f / hs oic clk bias /set 56 k 6 7 8 9 10 41213 15 14 3 2 16 v m 1.0 k 1.0 k 1.0 k 1.0 k 1.0 k 1.0 k 4.0 k 11 l3 l4 l1 l2 0.1 m f + 12 v figure 2. ac test circuit note: t r , t f (10% to 90%) for input signals are  25 ns. figure 3. bias /set timing (refer to figure 2) bias /set input v m pw bs v m - 1.0 v m - 1.0 t pbsd t pbsd (high impedance) 0 l1 - l4 outputs pin function description pin no. 20pin 16pin function symbol description 20 16 power supply v m power supply pin for both the logic circuit and the motor coil current. voltage range is + 7.2 to + 16.5 volts. 4, 5, 6, 7, 14, 15, 16, 17 4, 5, 12, 13 ground gnd ground pins for the logic circuit and the motor coil current. the physical configuration of the pins aids in dissipating heat from within the ic package. 1 1 clamp diode voltage v d this pin is used to protect the outputs where large voltage spikes may occur as the motor coils are switched. typically a diode is connected between this pin and pin 16. see figure 11. 2, 3, 18, 19 2, 3, 14, 15 driver outputs l1, l2 l3, l4 high current outputs for the motor coils. l1 and l2 are connected to one coil, and l3 and l4 to the other coil. 8 6 bias /set b /s this pin is typically 0.7 volts below v m . the current out of this pin (through a resistor to ground) determines the maximum output sink current. if the pin is opened (i bs < 5.0 m a) the outputs assume a high impedance condition, while the internal logic presets to a phase a condition. 9 7 clock clk the positive edge of the clock input switches the outputs to the next position. this input has no effect if pin 6 is open. 11 9 full /half step f /hs when low (logic a0o), each clock input pulse will cause the motor to rotate one full step. when high, each clock pulse will cause the motor to rotate onehalf step. see figure 7 for sequence. 12 10 clockwise / counterclockwise cw /ccw this input allows reversing the rotation of the motor. see figure 7 for sequence. 10 8 output impedance control oic this input is relevant only in the half step mode (pin 9 > 2.0 v). when low (logic a0o), the two driver outputs of the nonenergized coil will be in a high impedance condition. when high the same driver outputs will be at a low impedance referenced to v m . see figure 7. 13 11 phase a ph a this opencollector output indicates (when low) that the driver outputs are in the phase a condition (l1 = l3 = v ohd , l2 = l4 = v old ). application information general the mc3479 integrated circuit is designed to drive a stepper positioning motor in applications such as disk drives and robotics. the outputs can provide up to 350 ma to each of two coils of a twophase motor. the outputs change state with each lowtohigh transition of the clock input, with the new output state depending on the previous state, as well as the input conditions at the logic controls. outputs the outputs (l1l4) are high current outputs (see figure 5), which when connected to a twophase motor, provide two fullbridge configurations (l3 and l4 are not shown in figure 5). the polarities applied to the motor coils depend on which transistor (q h or q l ) of each output is on, which in turn depends on the inputs and the decoding circuitry.
mc3479 http://onsemi.com 5 note: t r , t f (10% to 90%) for input signals are  10 ns. t plha t phla t h t su pw clkl pw clkh 1.5 v 1.5 v phase a output f /hs, cw /ccw inputs 0 l1 - l4 outputs t pcd 3.0 v 0 clk 3.0 v figure 4. clock timing (refer to figure 2) 6.0 v 1.5 v current drivers and logic v d q h q l l2 parasitic diodes l1 motor coil q l v m b /s i bs i bs r b to l3, l4 transistors cw / ccw oic clk f /hs inputs logic decoding circuit figure 5. output stages q h the maximum sink current available at the outputs is a function of the resistor connected between pin 6 and ground (see section on bias /set operation). whenever the outputs are to be in a high impedance state, both transistors (q h and q l of figure 5) of each output are off. v d this pin allows for provision of a current path for the motor coil current during switching, in order to suppress backemf voltage spikes. v d is normally connected to v m (pin 16) through a diode (zener or regular), a resistor, or directly. the peaks instantaneous voltage at the outputs must not exceed v m by more than 6.0 v. the voltage drop across the internal clamping diodes must be included in this portion of the design (see figure 6). note the parasitic diodes (figure 5) across each q l of each output provide for a complete circuit path for the switched current. figure 6. clamp diode characteristics i d (ma) 300 100 200 0 0 1.0 2.0 3.0 v (v) f
mc3479 http://onsemi.com 6 full /half step when this input is at a logic a0o (<0.8 v), the outputs change a full step with each clock cycle, with the sequence direction depending on the cw /ccw input. there are four steps (phase a , b , c , d ) for each complete cycle of the sequencing logic. current flows through both motor coils during each step, as shown in figure 7. when taken to a logic a1o (>2.0 v), the outputs change a half step with each clock cycle, with the sequence direction depending on the cw /ccw input. eight steps (phase a to h ) result for each complete cycle of the sequencing logic. phase a , c , e and g correspond (in polarity) to phase a , b , c , and d , respectively, of the full step sequence. phase b , d , f and h provide current to one motor coil, while deenergizing the other coil. the condition of the outputs of the deenergized coil depends on the oic input, see figure 7 timing diagram. oic the output impedance control input determines the output impedance to the deenergized coil when operating in the halfstep mode. when the outputs are in phase b , d , f or h (figure 7) and this input is at a logic a0o (<0.8 v), the two outputs to the deenergized coil are in a high impedance condition e q l and q h of both outputs (figure 5) are off. when this input is at a logic a1o (>2.0 v), a low impedance output is provided to the deenergized coil as both outputs have q h on (q l off). to complete the low impedance path requires connecting v d to v m as described elsewhere in this data sheet. bias /set this pin can be used for three functions: a) determining the maximum output sink current; b) setting the internal logic to a known state; and c) reducing power consumption. a) the maximum output sink current is determined by the base drive current supplied to the lower transistors (q l s of figure 5) of each output, which in turn, is a function of i bs. the appropriate value of i bs is determined by: i bs = i od x 0.86 where i bs is in microamps, and i od is the motor current/coil in milliamps. figure 7. output sequence phase a output (a) full step mode a cw /ccw a a a a bias /set clk phase a output phase a a (c) half step mode cd l3 l4 f l1 e c l1 l2 l2 l3 l4 bd l1 cd b h g d bc ef (b) half step mode l2 l3 l4 gh b b c d b c b = logic 0" = logic 1" = logic 1" = high impedance cw /ccw = logic 0" f /hs = logic 1", oic = logic 0" d bc = high impedance = logic 0" = don t care f /hs oic cw /ccw f /hs oic
mc3479 http://onsemi.com 7 the value of r b (between this pin and ground) is then determined by: r b  v m  0.7 v i bs b) when this pin is opened (raised to v m ) such that i bs is <5.0 m a, the internal logic is set to the phase a condition, and the four driver outputs are put into a high impedance state. the phase a output (pin 11) goes active (low), and input signals at the controls are ignored during this time. upon reestablishing i bs , the driver outputs become active, and will be in the phase a position (l1 = l3 = v ohd , l2 = l4 = v old ). the circuit will then respond to the inputs at the controls. the set function (opening this pin) can be used as a powerup reset while supply voltages are settling. a cmos logic gate (powered by v m ) can be used to control this pin as shown in figure 11. c) whenever the motor is not being stepped, power dissipation in the ic and in the motor may be lowered by reducing i bs , so as to reduce the output (motor) current. setting i bs to 75 m a will reduce the motor current, but will not reset the internal logic as described above. see figure 12 for a suggested circuit. power dissipation the power dissipated by the mc3479 must be such that the junction temperature (t j ) does not exceed 150 c. the power dissipated can be expressed as: p = (v m  i m ) + (2  i od ) [(v m v ohd ) + v old ] where v m = supply voltage; i m = supply current other than i od ; i od = output current to each motor coil; v ohd = driver output high voltage; v old = driver output low voltage. the power supply current (i m ) is obtained from figure 8. after the power dissipation is calculated, the junction temperature can be calculated using: t j = (p  r q ja ) + t a where r q ja = junctiontoambient thermal resistance (52 c/w for the dip, 72 c/w for the fn package); t a = ambient temperature. figure 8. power supply current 50 i bs ( m a) i od = 0 10 20 0 60 50 40 30 70 150 200 250 300 350 100 i m (ma) for example, assume an application where v m = 12 v, the motor requires 200 ma/coil, operating at room temperature with no heatsink on the ic. i bs is calculated: i bs = 200  0.86 i bs = 172 m a r b is calculated: r b = (12 0.7) v/172 m a r b = 65.7 k w from figure 8, i m (max) is determined to be 40 ma. from figure 9, v old is 0.46 volts, and from figure 10, (v m v ohd ) is 1.4 volts. p = (12  0.040) + (2  0.2) (1.4 + 0.46) p = 1.22 w t j = (1.22 w  52 c/w) + 25 c t j = 88 c this temperature is well below the maximum limit. if the calculated t j had been higher than 150 c, a heatsink such as the staver co. v7 series, aavid #5802, or thermalloy #6012 could be used to reduce r q ja . in extreme cases, forced air cooling should be considered. the above calculation, and r q ja , assumes that a ground plane is provided under the mc3479 (either or both sides of the pc board) to aid in the heat dissipation. single nominal width traces leading from the four ground pins should be avoided as this will increase t j , as well as provide potentially disruptive ground noise and i r drops when switching the motor current. figure 9. maximum saturation voltage e driver output low i od (ma) 0 100 200 300 0.8 0.6 0.4 0.2 0 v old (volts) figure 10. maximum saturation voltage e driver output high 1.5 2.0 i od (ma) 1.0 0.5 0 0 100 200 300 [v m - v ] (volts) ohd
mc3479 http://onsemi.com 8 figure 11. typical applications circuit suggested value for r b1 (v m = 12 v) is 150 k w . r b calculation (see text) must take into account the current through r b1 . figure 12. power reduction r b normal operation set oic full /half step cw /ccw clock phase a typ 2.0 k w +v gnd mc3479 1n5221a (3.0 v) +v v m 1 16 11 7 10 9 8614 15 2 3 bias /set l4 l3 l2 l1 v d motor mc14049ub or equivalent digital inputs 13 12 45 reduced power normal operation bias /set r b1 r b 6 mc3479 mc14049ub or equivalent
mc3479 http://onsemi.com 9 package dimensions p suffix plastic package case 648c04 issue d dim min max min max millimeters inches a 0.744 0.783 18.90 19.90 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 e 0.050 bsc 1.27 bsc f 0.040 0.70 1.02 1.78 g 0.100 bsc 2.54 bsc j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.040 0.39 1.01     notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 16 9 18 d g e n k c 16x a m 0.005 (0.13) t seating plane b m 0.005 (0.13) t j 16x m l a a b f t b
mc3479 http://onsemi.com 10 notes
mc3479 http://onsemi.com 11 notes
mc3479 http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc3479/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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